Advantages of ECL | Disadvantages of ECL
This page covers advantages and disadvantages of ECL. It mentions ECL advantages and ECL disadvantages over TTL and CMOS. ECL stands for Emitter Coupled Logic.
• It is also known by the name "current mode logic".
• The basic gate is OR/NOR.
• In ECL logic family, logic 0 is represented as about -1.75 V and logic 1 is represented as about -0.9 V with respect to ground.
Advantages of ECL
Following points summarize ECL advantages over TTL and CMOS:
➨It has fanout of 25 which is better than TTL and less then CMOS.
➨It has average propagation delay time ( 1 to 4 ns ) better compare to both TTL and CMOS. Hence it is known as fastest logic family.
Disadvantages of ECL
Following points summarize ECL disadvantages over TTL and CMOS:
➨It has noise immunity worst compare to both TTL and CMOS.
➨It has power per gate of about 4 to 55 mW. This power consumption figure is higher compare to both TTL and CMOS.
Also refer difference between TTL ECL and CMOS>>.
Advantages and Disadvantages of other wireless technologies
What is Difference between
difference between TTL ECL and CMOS
difference between OFDM and OFDMA
Difference between SC-FDMA and OFDM
Difference between SISO and MIMO
Difference between TDD and FDD
FDMA vs TDMA vs CDMA
FDM vs TDM
CDMA vs GSM