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Wi-Fi 8 Front-Ends: Pros & Cons of Digital Pre-Distortion

By RF Wireless Expert Team

In modern wireless communications, transmitting data at incredibly high speeds requires complex modulation schemes like the 4096-QAM used in Wi-Fi 7 and Wi-Fi 8. To transmit these dense data packets successfully, the radio signal must be exceptionally clean which requires Error Vector Magnitude (EVM) of around - 45 dBc.

However, no Power Amplifier (PA) whether made of Silicon or Gallium Arsenide (GaAs) can natively amplify a signal to this level of cleanliness while maintaining battery efficiency. To solve this, the industry relies on a sophisticated digital software technique known as Digital Pre Distortion (DPD). Let us explore how DPD works in Wi-Fi 8 RF front ends along with its advantages and disadvantages.

What is Digital Pre-Distortion (DPD)?

When a Power Amplifier (PA) pushes a signal at high power to maximize efficiency, it inherently distorts the signal (non linearity). DPD is a digital subsystem that sits in the baseband processor before the signal ever reaches the amplifier. It uses an “observation receiver” to measure the output of the amplifier, characterizes the exact distortion the amplifier is creating and then calculates an inverse mathematical model.

The DPD system then purposefully “pre-distorts” the digital signal with the exact opposite errors. When this pre-distorted signal passes through the amplifier, the amplifier’s natural distortion and the digital pre-distortion cancel each other out. The result is a perfectly clean, highly linear signal that meets the strict demands of 4096-QAM.

Example : One can think of DPD as “noise canceling headphones” used for a radio signal.

Advantages of DPD

Following are some of the benefits of DPD Technique.

  • Enables High Order Modulation: Without DPD, achieving the -45 dBc EVM required for Wi-Fi 8’s 4096-QAM would be nearly impossible using traditional GaAs amplifiers without running them at impractically low power levels.
  • Boosts Power Efficiency: DPD allows the power amplifier to operate 2 to 4 dB closer to its saturation point (i.e. at its maximum limit). This significantly increases the peak Power Added Efficiency (PAE) of the system, squeezing more battery life out of the device under ideal conditions.
  • It allows hardware engineers to use cheaper, natively non linear amplifiers and correct their physical shortcomings using smart digital processing.

Disadvantages of DPD in Wi-Fi 8

While DPD is brilliant in theory, Wi-Fi 8 (IEEE 802.11bn) introduces feature called Ultra High Reliability (UHR) which prioritizes low latency, dropped packet reduction and real world edge coverage. In this context, DPD introduces following challenges.

  1. Impedance Mismatch: Hand grip induced antenna impedance changes invalidate DPD models, potentially worsening linearity and causing up to 7 dB degradation at 3:1 VSWR.

  2. Power Overhead: DPD’s observation receiver, high speed ADCs and adaptation engine consume 100 to 200 mW per transmit chain, with overhead increasing at 320 MHz bandwidth. This erodes battery savings the DPD was meant to provide.

  3. Latency Overhead: DPD’s continuous signal capture, processing and correction loop adds transmit pipeline delay, challenging Wi-Fi 8’s 25 % worst case latency reduction target.

  4. Adaptation Challenges: DPD requires a continuous, stable flow of full-band data to train its algorithms effectively. However, Wi-Fi 8 features like Multi-Link Operation (MLO) and dynamic subband operation make network traffic incredibly bursty and agile. Because the data bursts are so fast and jump between bands, the DPD adaptation loop is starved of the stable signals it needs to learn. Consequently, the coefficients go “stale,” and the amplifier drifts out of compliance.

Summary

Digital Pre-Distortion is a powerful tool that made the transition to extreme Wi-Fi speeds possible. However, its reliance on fixed mathematical models, high power consumption and latency make it misaligned with the ultra reliable, dynamic demands of Wi-Fi 8. This has led hardware designers to begin exploring fully analog, “Linear by Design” hardware architectures (e.g. CMOS SOI) that can physically withstand real world variables without relying on digital software corrections.

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