Advantages of CMOS | Disadvantages of CMOS
This page covers advantages and disadvantages of CMOS. It mentions CMOS advantages and CMOS disadvantages over TTL and ECL. CMOS stands for complementary metal oxide semiconductor.
• CMOS circuits use both p-channel and n-channel devices.
These are interconnected and fabricated on the same substrate to form logic functions.
• NAND or NOR are used as basic gates.
• logic 0 is represented between 0V to 1V and logic 1 is represented between 3.5V and 5V.
• Due to logic level representation TTL is recognised as 3V system while CMOS as 5V system. The TTL to CMOS converters are available which helps in converting TTL to CMOS logic levels and vice versa.
Advantages of CMOS
Following points summarize CMOS advantages over TTL and ECL:
➨The power per gate is 1 mW @ 1 MHz. This power consumption is less than TTL and CMOS.
➨The noise immunity is better than both TTL and ECL. The noise margin is about 40% of supply voltage.
➨Fanout (about > 50) is better than both TTL and ECL.
➨CMOS works satisfactorily over wide temperature range from -155 to 125 degree C.
➨It is compatible with 5V supply used in TTL circuits.
➨Nominal supply voltage ranges from 3V to 15V while TTL supports 5V.
Disadvantages of CMOS
Following points summarize CMOS disadvantages over TTL and ECL:
➨average propagation delay time (1 to 200 ns ) is worst compare to TTL and ECL logic families.
Also refer difference between TTL ECL and CMOS>>.
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