RF Synthesizer basics
This page covers RF synthesizer basics and provide RF synthesizer manufacturers.
Device used to select rf carrier frequency from pool of frequencies in wireless system is called RF synthesizer. It is used as variable RF frequency generator source. The tuning of RF frequency depends on the step size. It is used for various applications such as in RF transceiver, base stations, mobile subscribers, test and measurement equipments such as VSG (vector signal generator)/VSA (vector signal analyzer) and so on. It covers all the technologies satellite communication, terrestrial microwave communication, wimax, wlan, lte, gsm, cdma etc.
As mentioned above in the block diagram, RF synthesizer is made up of phase comparator, frequency dividers,
Loop filter, VCO, PLL, reference clock oscillator.
Synthesizer equation is mentioned below.
Fout= N (Fr/R) , for Integer PLL
Fout= (N+F) (Fr/R), for fractional PLL
As mentioned here Output frequency of synthesizer is multiple of input frequency, hence often frequency synthesizer is called as frequency multiplier. Output of frequency synthesizer can be obtained by either fixing Fr and varying N or varying Fr and fixing N. The design example mentioned below is for the second case.
Channel spacing=Fvco/N or Fr/R.
As mentioned in the block diagram above, phase detector/comparator compares two input signals and
produces DC voltage(error voltage) based on phase difference of the two. Phase detector can be considered as simple EX-OR gate
to understand the concept here. Loop filter is a simple Low Pass Filter, which removes high frequency noise and produces dc level.
The VCO output frequency is compared with the reference frequency and adjusted until it is equal to the input frequency.
Divide by R and Divide by N are simple frequency dividers.
PLL operates in three stages as mentioned below.
1. Free running: Before the input is applied to the PLL, PLL is said to be in free running state.
2. Capture: As soon as input frequency is applied, VCO frequency will start to change and PLL is said to be in capture mode.
3. Phase Lock: VCO frequency continues to change till it is equal to the input reference frequency and PLL in this condition is said to be in phase locked state.
Design of frequency synthesizer
Let us understand design of rf synthesizer with major specifications mentioned below.
• Output frequency: 950-1450 MHz
• Step size: 1 MHz
• Low Phase noise: -88 dBc at 1 KHz offset
• Spurious: -70dBc
• Harmonics: less than -20dBc typically
• External Reference: 10 MHz
Rules of thumb for design:
• Switching time approximately equals to 50/Fcomp, where Fcomp is the comparison frequency at the input of Phase comparator/detector.
• Switching time approx. equal to 2.5/Flbw, where Flbw is the loop bandwidth of loop filter.
• Loop filter loop bandwidth= 1/10 (Fcomp).
As mentioned here the design of frequency synthesizer is done by buying out PLL chip, VCO chip and DDS chip.
In this example PLL chip is ADF-4252 from Analog devices, VCO is V585ME40 from ZCOMM and DDS chip is AD9851 from Analog devices.
The loop filter need to be designed based on the rules of thumb mentioned above. Loop filter design can be done by entering required parameters.
In the design of rf synthesizer various parameters are optimized based on requirement. For example for the case where switching time is not so critical, then choice of loop
parameters will be determined by phase noise and spurious specifications.
Loop filter tools are available on the various websites as mentioned below.
National Semiconductor site(webench4.ti.com)
Loop filter calculator on circuitsage site.(www.circuitsage.com).
With this design, RF synthesizer with low phase noise and high speed of switching can be developed.
This high performance RF synthesizer can be used in the design of RF Transceiver based systems.
Refer RF synthesizer settling time measurement setup➤.
RF synthesizer manufacturers
Visit our page on RF synthesizer manufacturers. This page covers PLL,VCO and integrated synthesizer including PLL/dividers, READ MORE.