Advantages of LVDS | Disadvantages of LVDS signal interface
This page covers advantages and disadvantages of LVDS signal interface. It mentions benefits or advantages of LVDS and drawbacks or disadvantages of LVDS.
What is LVDS?
The signal type LVDS is the short form of Low Voltage Differential Signaling. The primary standard of LVDS is defined in TIA/EIA-644. IEEE 1596.3 is also used as alternative standard for LVDS. It has current output which is about 4 mA. LVDS output is designed to drive 100 Ohm load as it has output impedance of about 100 Ohm.

LVDS is used for various applications which include backplane transceivers, clock distribution and other high speed data transfer between boards and between links on the same PCB. LVDS interface operates with data speeds up to 3.125 Gbps. LVDS signal may or may not require AC coupling after 100 Ohm load.
Benefits or advantages of LVDS
Following are the benefits or advantages of LVDS:
➨Power consumption is lower than LVPECL and other signal types.
➨It supports smaller voltage swing which is about 350 mV.
➨It offers ground noise rejection and common mode noise rejection.
➨It supports long line length and higher signaling rates (as it maintains signal integrity).
➨It has low EMI emissions compare to TTL/CMOS interfaces.
➨It is easy to implement in CMOS ICs.
➨LVDS output does not require any external biasing.
➨It supports data, clock and control signals.
Drawbacks or disadvantages of LVDS
Following are the drawbacks or disadvantages of LVDS:
➨It does not support multipoint applications unlike M-LVDS, RS485 and CAN interfaces.
➨It has reduced jitter performance than PECL signal interface.
➨It can support data rates upto 3.125 Gbps. For higher than this data rate, other signal
interfaces such as HCSL, LVPECL or CML are needed.
➨It is higher in cost.
➨It requires twisted cable.
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