1 wire protocol basics | Powering Modes,Signaling Modes
This tutorial covers 1 wire protocol basics. It mentions one wire interface bus requirements, one wire power modes, 1 wire protocol signaling modes etc. It describes difference between 1 wire protocol and 2 wire protocol i.e. I2C.
As the name suggests, one wire protocol uses single wire interface for data communication between devices. It uses master and slave configuration in which single slave or multiple slaves are interfaced with single master on the bus. It is generally used for low power and low speed communication. The data communication is byte wise in which LSB (Least Significant Bit) is transmitted first.
Following are the features of 1 wire interface protocol:
• It use single data line and no clock is needed. There are at least two wires (i.e. data and GND) used for 1 wire protocol.
• The clock signal is not required as slave devices make use of internal clock. This internal clock signal is synchronized with signal from master device.
• It has Half duplex communication mechanism.
• It has less hardware complexity but has more software complexity in implementing the algorithm.
• Due to less wiring, it is cheaper interface protocol and hence it is economical.
• It uses supply voltage between 2.8V to 5.25V .
• It uses 64 bit device addressing scheme.
• The multiple slaves are supported in multi-drop mode.
• It supports data rate of 16.3 Kbps in standard mode and 163 kbps in overdrive mode.
• It has less power consumption.
1 wire interface Bus Requirements | Power Modes
The figure-1 depicts simple 1 wire interface configuration between single master and multiple slaves in multi-drop mode. Following interface bus requirements and power modes are supported.
All the output pins should be connected with weak pull up resistor and they must be open drain. The bus will have low state when any one device drives it low. The transfer of data occurs between two devices when others are in IDLE state. The device uses external power. Hence it requires pull up values 10K or higher for lower data rate with less trace length. It requires pull up less than 1K for higher data rate with long trace length.
There are two power modes supported by slave devices.
• External mode: Slave requiring more power uses this mode. Power pin is used on the slave device to interface with external supply.
• Parasitic mode: Slave derives power from the data line. When the bus is idle, it utilizes capacitor to store the energy. It is pulled up by weak pull up resistor.
1 wire protocol signaling modes
The figure-2 depicts write 0/1 bit signaling diagram. As shown, drive the bus low for about 60µs to write 0 bit. To write 1 bit, drive the bus low for less than 15 µs. Typically 6µs is used. Release the bus until 60 µs after falling edge.
The figure-3 depicts read 0/1 bit signaling diagram. The read bit signaling is same as write 1 signaling diagram. Here master will read instead of writing. The logic for reading is to drive the bus low from 1µs to 15µs. Here sampling of bus is done after falling edge to read the bit from slave usually at 15 µs.