8051 instruction set-opcode,operand,size in bytes,M-cycle
This page covers 8051 instruction set. The 8051 instructions are specified with opcode, operand, size in bytes, M-cycle (number of machine cycles) etc. Here one machine cycle consists of 12 oscillator periods.
Following table-1 mentions meanings of terms used in the instructions mentioned in the other tables along with addressing modes.
| Instructions | Description |
|---|---|
| Rn | It indicates register R7 to R0. |
| direct | It indicates 8 bit address of the internal data location. |
| @Ri | 8 bit address of internal RAM indicated by register R1 or R0. |
| #data | 8bit constant included in the instruction. |
| #data 16 | 16bit constant included in the instruction. |
| addr 16 | 16 bit destination address |
| addr 11 | 11 bit destination address |
| rel | signed (2's complement) 8 bit offset byte |
| bit | direct addressed bit in internal data RAM or SFR |
Table-1
8051 Instructions with their opcodes, operands, size in bytes, Machine cycles
8051 instruction set is divided into following categories.
• Arithmetic instructions
• Logical instructions
• Data transfer instructions
• Boolean instructions
• Branching instructions
Arithmetic instructions
| Instruction opcode | Operand | Size in bytes | machine cycles | Description |
|---|---|---|---|---|
| ADD | A,Rn | 1 | 1 (12 Oscillator periods) | Add register to accumulator |
| ADDC | A,Rn | 1 | 1 | Add register to accumulator with carry |
| SUBB | A,Rn | 1 | 1 | substract register from ACC with borrow |
| INC | A | 1 | 1 | Increment accumulator |
| DEC | A | 1 | 1 | Decrement accumulator |
| INC | DPTR | 1 | 2 | Increment data pointer |
| MUL | AB | 1 | 4 (i.e. 48 Oscillator periods) | Multiply A and B |
| DIV | AB | 1 | 4 (i.e. Oscillator periods) | Divide A by B |
Logical instructions
| Instruction opcode | Operand | Size in bytes | machine cycles | Description |
|---|---|---|---|---|
| ANL | A,Rn | 1 | 1 | AND regsiter to Accumulator |
| ANL | A,direct | 2 | 1 | AND direct byte to accumulator |
| ANL | A,@Ri | 1 | 1 | AND indirect RAM to accumulator |
| ANL | A,#data | 2 | 1 | AND immediate data to accumulator |
| ANL | direct,A | 2 | 1 | AND accumulator to direct byte |
| ANL | direct,#data | 3 | 2 | AND immediate data to direct byte |
| ORL | A,Rn | 1 | 1 | OR register to accumulator |
| XRL | A,Rn | 1 | 1 | Exclusive-OR register to accumulator |
| CLR | A | 1 | 1 | Clear accumulator |
| CPL | A | 1 | 1 | Complement accumulator |
| RL | A | 1 | 1 | Rotate accumulator left |
| RLC | A | 1 | 1 | Rotate accumulator left through the carry |
| RR | A | 1 | 1 | ROtate accumulator right |
| RRC | A | 1 | 1 | Rotate accumulator right through the carry |
| SWAP | A | 1 | 1 | Swap nibbles within the accumulator |
Data Transfer instructions
| Instruction opcode | Operand | Size in bytes | machine cycles | Description |
|---|---|---|---|---|
| MOV | A,Rn | 1 | 1 | Move register to accumulator |
| MOV | A,direct | 2 | 1 | Move direct byte to accumulator |
| MOV | A,#data | 2 | 1 | Move immediate data to accumulator |
| MOVC | A,@A+DPTR | 1 | 2 | Move code byte relative to DPTR to Acc |
| MOVX | A,@Ri | 1 | 2 | Move external RAM (8 bit address) to Acc. |
| PUSH | direct | 2 | 2 | Push direct byte onto stack |
| POP | direct | 2 | 2 | POP direct byte from stack |
| XCH | A,Rn | 1 | 1 | exchange register with accumulator |
| XCH | A,direct | 2 | 1 | exchange direct byte with accumulator |
| XCH | A,@Ri | 1 | 1 | Exchange indirect RAM with accumulator |
| XCHD | A,@Ri | 1 | 1 | Exchange low order digit of indirect RAM with ACC |
Boolean instructions
| Instruction opcode | Operand | Size in bytes | machine cycles | Description |
|---|---|---|---|---|
| CLR | C | 1 | 1 | Clear Carry |
| CLR | bit | 2 | 1 | clear direct bit |
| SETB | C | 1 | 1 | set carry |
| SETB | bit | 2 | 1 | set direct bit |
| CPL | C | 1 | 1 | complement carry |
| CPL | bit | 2 | 1 | complement direct bit |
| ANL | C,bit | 2 | 2 | AND direct bit to carry |
| ANL | C,/bit | 2 | 2 | AND complement of direct bit to carry |
| ORL | C,bit | 2 | 2 | OR direct bit to carry |
| MOV | C,bit | 2 | 1 | Move direct bit to carry |
| MOV | bit,C | 2 | 2 | move carry to direct bit |
| JC | rel | 2 | 2 | Jump if carry is set |
| JNC | rel | 2 | 2 | Jump if carry is not set |
| JB | bit,rel | 3 | 2 | Jump if direct bit is set |
| JNB | bit,rel | 3 | 2 | Jump if direct bit is not set |
| JBC | bit,rel | 3 | 2 | Jump if direct bit is set and clear bit |
Branching instructions
| Instruction opcode | Operand | Size in bytes | machine cycles | Description |
|---|---|---|---|---|
| ACALL | addr11 | 2 | 2 | Absolute subroutine call |
| LCALL | addr16 | 3 | 2 | Long subrouting call |
| RET | - | 1 | 2 | return from subroutine |
| RETI | - | 1 | 2 | return from interrupt |
| AJMP | addr11 | 2 | 2 | Absolute Jump |
| LJMP | addr16 | 3 | 2 | Long Jump |
| JMP | @A+DPTR | 1 | 2 | Jump indirect relative to the DPTR |
| JZ | rel | 2 | 2 | Jump if accumulator is zero |
| JNZ | rel | 2 | 2 | Jump if accumulator is non zero |
| CJNE | A,direct,rel | 3 | 2 | compare direct byte to acc and jump if not equal |
| DJNZ | Rn,rel | 2 | 2 | decrement register and jump if not zero |
| DJNZ | direct,rel | 3 | 2 | decrement direct byte and jump if not zero |
| NOP | - | 1 | 12 | No Operation |
8051 Microcontroller Links
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