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1 wire vs 2 wire | difference between 1 wire and 2 wire interface protocols

This page compares 1 wire protocol vs 2 wire protocol (I2C) and mentions difference between 1 wire interface protocol and 2 wire interface protocol (I2C).

Following table summarizes difference between 1 wire protocol and 2 wire protocol.


Specifications 1 wire interface protocol 2 wire interface protocol (I2C)
Number of lines Uses single data line and no clock, requires at least two wires (data and GND) Uses clock line and data line, requires four wires (MISO, MOSI, SCLK, SS)
Clock signal Not required, as each of the slave devices are clocked using internal oscillator. The oscillator is synchronized to falling edge of the master. Requires separate SCL line. It is low at START of communication and high at the END of communication. It is referred as START condition and STOP condition.
Type of communication Half duplex Full duplex
Hardware complexity Less More
Software complexity More Less
Cost Cheaper i.e. economical costlier
Supply parasitic supply i.e. draws power from the data line external supply is needed for its operation
Supply voltage range Usually from 2.8V (min.) to 5.25V (max.) +5 or +3.3V or lower
Device addressing 64 bit uses 7 bit or 8 bit or 9 bit device addressing
Modes strictly master-slave, multiple slaves are supported in multi-drop mode. multi master is supported
Data rate or speed 16.3 Kbps (standard mode)
163 (overdrive mode)
slower
about 400 Kbps
much faster
voltage for logic 0 and logic 1 • Uses CMOS/TTL levels, Hence logic 0 is represented by 0.8V(max.) and logic 1 is represented by 2.2V (min.)
It is often represented by variation in pulse width i.e. logic 0 by wider and logic 1 by narrower width. Hence it is similar to PWM.
The voltage levels are not fixed due to use of various technology based devices viz. NMOS, CMOS and Bipolar. VIL is usually represented by 0.3*VDD and VIH is represented by 0.7*VDD.
Power consumption Lower Higher
Distance longer shorter
References Refer I2C Interface>>.

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